Data bus

ABSTRACT

In apparatuses (1, 2, 3) controlled or operated via an I 2  C bus, it may be necessary to take measures to suppress interference signals at the data signal input/output of the respective apparatus without impairing the data transport at the same time. The data line at the data signal input/output contains an RC element, in the form of a low-pass filter, with a diode connected in parallel with the RC element, the low-pass filter action allowing the arrangement to be used to suppress interference signals acting on the data signal input/output, and, secondly, the transmissive action of the diode meaning that the arrangement does not impair a data signal leaving the data signal input/output.

This application claims the benefit, under 35 U.S.C. §365 ofInternational Application PCT/EP01/13343, filed Nov. 19, 2001, which waspublished in accordance with PCT Article 21(2) on May 30, 2002 inEnglish and which claims the benefit of German patent application No.10058793.3, filed Nov. 27, 2000.

The invention is based on a data transfer system having a data bus, inparticular having an I2C data bus, in accordance with theprecharacterizing clause of Claim 1.

The use of an I2C bus, which in the simplest application instancecomprises a “serial data line” SDA and a “serial clock line” SCL, isknown for bidirectional transfer of data and clock signals forintercommunicating appliances and/or appliance components, calledapparatuses below. In this case, a respective one of the apparatusesacts as a transmitter and/or as a “master”, while another reacts as areceiver, called the addressed apparatus below.

Interference signals—in particular crosstalk from radio-frequency signalcomponents in the, clock signal of the apparatus acting as transmitterand/or master to the data input/output of an apparatus which is notbeing addressed in this case—may mean that it is necessary to takeappropriate measures to suppress interference signals in order toprevent operating faults in the apparatuses. Known measures are gatecircuit functions, also called I2C bus gating, using integratedcircuits, and/or less effective means, such as electrical screening ofbus lines and appropriate provisions in the circuit layout.

Another means of suppressing interference signals is to use a low-passfilter having a resistor R_(S) connected in series with the datainput/output of the respective apparatus, but in this case conditionsassociated with the use of such a data transfer system (see I2C busspecification, e.g. I2C bus allocation table General, 1997 Mar. 3, fromPHILIPS)—in particular on account of the rise and fall time requirementsfor the pulse edges of data and clock signals—severely restrict thedimensioning of such a resistor R_(S). In addition, a low-pass filterformed using an RC element impairs the “Acknowledge” function of suchapparatuses.

It is therefore an object of the invention to use relatively simplemeans to suppress interference signals in a data transfer system havinga data bus without impairing the data traffic.

This object is achieved by a data transfer system having a data bus, asspecified in claim 1.

The invention is based on the following requirements and insights: whenapparatuses are controlled or operated via an I2C, bus—such as the tunerin today's television sets, which controlled by the apparatuses foroperating the set—it is necessary for the tuner addressed via the bus togive an acknowledgement (ACK) for confirmation purposes for each dataword transferred. In this context, measures for suppressing interferencesignals on the data line are, in principle, not necessary for theapparatus addressed—or in this case for the tuner addressed—on accountof the impedance and signal-magnitude circumstances during datatransfer; however, it is important for the respective bit (ACK) providedfor acknowledgement purposes to be clearly detectable by the controlapparatus acting as transmitter and master.

If, however, a different apparatus—such as a “microcontroller” providedin the television set for setting video and/or audio signals—isaddressed by the control apparatus, it is necessary to keep interferencesignals away from the appropriate data input/output of the tuner, whichis now no longer being addressed, which could, in principle, be doneusing an RC element in the form of a low-pass filter, if this were notprevented by such a low-pass filter's impairment of the transmissionquality for acknowledging bits provided (ACK).

The invention overcomes this drawback, which would be caused by merelyusing an RC element in the form of a low-pass filter while using theaforementioned I2C bus specification, by connecting a diode in parallelwith the RC element such that the RC element is able to suppressinterference signals effectively and, secondly—when an apparatus isaddressed via such a data bus—virtually does not impair the transmissionquality of data signals.

The invention has the advantage that it can be implemented usingrelatively simple electrical components and makes the transfer of bitsprovided for acknowledgement (ACK) more reliable.

Other advantages and developments can be found in the description belowand in the claims.

The invention is explained in more detail with reference to a drawing,in which

FIG. 1 shows a simplified illustration of a data transfer system in anappliance;

FIG. 2 shows a graph-like illustration of bits being transferred.

FIG. 1 shows an illustration, in block-diagram form, of apparatuses 1–3capable of communicating via an I2C bus 4, such as a tuner 1, anappliance operating and control apparatus 2 having a microprocessor, andan electronic adjustment apparatus 3 for video and audio signals in atelevision set (not shown).

The I2C bus 4 comprises, in a manner known per se, a serial data lineSDA and a serial clock line SCL for bidirectional transfer of datasignals DATAN1–DATAN3 and clock signals SCLKN1–SCLKN3, the data line SDAand the clock line SCL being electrically connected to a positive supplyvoltage V_(DD) via a respective “pull-up resistor” R_(p). The clock lineSCL is electrically connected to the clock signal input of therespective apparatus 1–3, the clock signal input of an apparatussimultaneously being the clock signal output thereof as well, as isknown.

By contrast, the data line SDA is electrically connected via arespective low-pass filter, formed using a resistor R_(S) and acapacitor C, to the data signal input of the respective apparatus1–3—called data signal input/output below, since the data signal inputof such an apparatus 1–3, too, is simultaneously the data signal outputthereof as well. In this case, according to the invention, a diode D isconnected in parallel with the resistor R_(S) of the respective low-passfilter by electrically connecting the anode of said diode to the dataline SDA and electrically connecting the cathode of said diode to thedata signal input/output of the appropriate apparatus 1–3. However, whenchoosing the dimensions of the low-pass filter, it should be rememberedthat the I2C bus specification limits the “bus load capacitance” (e.g.to 400 pf). The bus load capacitance can be split in relation to thecapacitance values of such low-pass filters in different ways, however,for example taking into account the susceptibility to interference ofthe respective apparatus 103.

To simplify understanding of the apparatuses 1–3 shown in FIG. 1, it maybe pointed out, by way of addition, that the signal inputs of theamplifiers A_(1a)–A_(3b) shown in symbol form within the respectiveapparatus 1–3 correspond to the respective clock signal input and therespective data signal input. At the same time, the drain connections ofthe field-effect transistors T_(1a)–T_(3b) used as output amplifierscorrespond to the signal outputs of the apparatuses 1–3.

The way in which the circuit arrangement works is described below withreference to inherently known pulse diagrams a–c (FIG. 2) for the datatraffic on an I2C bus: thus, by way of example, during communicationbetween two apparatuses, the appliance operating and control apparatus 2is meant to act as a transmitter and master, and the tuner 1 is meant toreact as a receiver. To this end, the appliance operating and controlapparatus 2 feeds a data signal 4 addressed to the tuner 1 (diagrama)—in conjunction with the supply of an appropriate pulsed clock signal5 (diagram c) into the clock line SCL—into the data line SDA. The datasignal 4 is known to comprise a sequence of pulsed data words whichrespectively last eight clock pulses and can be read by the tuner 1 onthe basis of appropriate addressing, the tuner 1 outputting a pulsedenoted ACK (diagram b) onto the data line SDA at the end of such a dataword—i.e. during the respective ninth clock pulse—for the purposes ofacknowledging reception by turning on the field-effect transistorT_(1b), used as output amplifier, for a prescribed time such that thedrain connection of said field-effect transistor practically carriesreference-earth potential. This means that current can flow throughdiode D. Hence, the magnitude of the aforementioned pulse ACK is reducedmerely by the diode forward voltage, which is approximately 0.2 voltwhen a germanium diode is used, for example, so that pulses ACK foracknowledging reception of data words remain virtuallyunimpaired—despite the use of such a low-pass filter for suppressinginterference signals.

Another advantage obtained is that, for such a low-pass filter,correspondingly larger values can be used for the resistance R_(S) andthe capacitance C, which values, without the inventive use of the diodeD, would otherwise infringe the I2C BUS specification. This is because,without the inventive use of the diode D, the maximum permitted voltagedrop across the resistor R_(S) determines the maximum value thereof whenthe data line SDA is switched from the “pulse HIGH” level V_(OH) to the“maximum pulse LOW” level V_(OLmax) (e.g. 0.4 volt at 3 milliamps outputcurrent). On the basis of the I2C bus specification, however, the risetime t_(r) of the pulse edges is affected primarily by the bus loadcapacitance and the pull-up resistor R_(p). This means that, if thelow-pass filter capacitance C is enlarged, it is only necessary toinvolve a corresponding reduction in the size of the pull-up resistorR_(p).

Correspondingly larger values for the resistance R_(S) and thecapacitance C can be ascertained, for example, using measurements whileobserving the maximum permissible pulse rise time t_(rmax) (of 1000nanoseconds, for example).

1. Data transfer system for intercommunicating apparatuses having a databus which comprises a serial data line and a serial clock signal lineand having interference signal suppression means for preventing signalcrosstalk from the clock signal line to the data line and/or vice versa,wherein the data line to the data signal input/output of an apparatusconnected to the data bus contains an RC element, in the form of alow-pass filter, with a diode connected in parallel with the RC element,the low-pass filter action allowing said arrangement to be used tosuppress interference signals acting on the data signal input/output,and, secondly, the transmissive action of the diode meaning that saidarrangement does not impair a data signal leaving the data signalinput/output.
 2. Data transfer system according to claim 1, wherein thediode used is a germanium diode.
 3. Data transfer system according toclaim 1, characterized in that wherein RC elements in the form oflow-pass filters for such apparatuses have different cut-offfrequencies.